Friday, June 20, 2014

Value Proposition and the Custom Chip Market: Part 2 - the ASIC Vendors

Some bold adventurers disdain
The limits of their little reign,
And unknown regions dare descry. - 
Thomas Gray

Shortly after joining LSI Logic in 1996, I attended an event celebrating the recent release of LSI's 0.35um ASIC technology called "G10" (for tenth generation.) CEO and founder Wilf Corrigan gave an impromptu speech at the event, describing some of the difficulties faced by the company in its early years after its founding in 1981.

The early ideas regarding custom silicon as a business were very basic, revolving around the operations department's interest in keeping a fab line fully utilized for cost purposes. Corrigan and his colleagues had a much bolder vision and saw custom silicon as a potential business segment of its own - an idea scoffed at by much of the industry at the time.

The first several years were a difficult struggle as the startup pioneered all the technical and business aspects of the segment, first beginning as a bipolar-based company and then transitioning to CMOS, then developing the first integrated toolset for developers, and finally finding its footing in supplying the burgeoning Mil/Aero demand for cutting edge chip technology in the mid-80's. In the following years, the company branched out into the broader semiconductor market - Computing, Communications and Consumer (the Three C's.) 

A crowning achievement of LSI and a vivid demonstration of the richness of its accumulated knowledge base was the development of the applications processor for Sony's first Playstation console in the early 90's. LSI brought to bear all the fruits of its institutional history, using a combination of third party and homegrown EDA tools to create a multitude of accelerators and functions and integrate them as IP cores into one complex design.

For the ASIC portion of its history, LSI was a hotbed of innovation in Silicon Valley. The EDA, IP and SoC sectors of the industry owe much to the engineers at LSI Logic. From Coreware to home grown design tools to packaging, LSI was constantly breaking new ground.  

LSI did not get everything right, of course. With experimentation there are failures, and too many experimental directions inevitably result in the pursuit of certain avenues of R&D at the expense of others. Jen-Hsun Huang felt LSI had given short shrift to GPU development and eventually left to form NVidia. Also, while LSI was still primarily an ASIC house, it never properly engaged itself in learning how to develop software stacks and thus missed out on the SoC business until it was already well established by Broadcom and other companies.

Nevertheless, my years at LSI were a joyful smorgasbord of technologies spread out for me to sample at will. It was a high end Las Vegas buffet of tech toys that woke me up in high spirits every morning, eager to get to the office and jump into the day's activities. Believe me, folks, it was FUN.

We have scotch'd the snake, not killed it. - William Shakespeare, Macbeth

There have been other ASIC companies in the industry who also led the chip industry in innovation - most notably IBM, who brought copper metal stacks and vias to silicon for the first time in 1998 at 180nm, along with their own in-house developed tools suite that could outperform anything available from EDA vendors, LSSD embedded scan that permitted fault isolation down to the level of individual transistors, and an incredible attention to detail that allowed Big Blue to extract more density, performance and yield from silicon than any foundry on the planet. 

But IBM demonstrated some of the same limitations of LSI Logic, TI, NEC and other past and present ASIC companies - a near complete focus on the customization of hardware and almost zero attention to software. The most ASIC firms do with software is perhaps offer API frameworks, drivers and firmware for some of their embedded cores, but full software stacks have long been beyond their reach or interest.

Design starts really took a nosedive beginning in the mid 90's, as the transition from 0.5um to .35um saw the final curtain drawn on gate arrays in favor of standard cells and mask costs reached the point that many companies started getting priced out of the market. Revenues started shrinking steadily as well, with the peak of $18B-$19B inthe late 90's now having shrunk to perhaps $12B-$13B today. 

The total coverage by ASIC companies of the technical 'wish list' of custom chip customers can be graphically illustrated by the colors and shades of the puzzle pieces in Figure 1 below. (Though it is by necessity rather qualitative, I've done my best to make it a fair assessment.)

To interpret the figure, consider the darkness of a particular puzzle piece to be indicative of how well the particular custom chip segment fills a customer's need for the given aspect of custom logic functionality. One can see the ASIC bias for hardware in very clear terms above.

It is important to recognize that though they generally consider themselves to be chipmakers, ASIC companies do not offer products in the conventional sense. They are more akin to IP companies, in that they offer a set of capabilities that allow clients to build their own highly personalized chip products. These capabilities include quite a lot of hardware - standard cell and I/O libraries, SRAM compilers, higher performance blocks such as SERDES and a variety of embedded 'vanilla' cores for standard protocols such as PCIe and Ethernet PHYs & MACs. The embedded IP blocks are offered with timing and simulation models, along with logic wrappers, for use in a vendor's methodology flow that supports design description, simulation, verification, integration and debug thru a toolset normally comprised of commercial EDA tools bolstered by vendor-developed utilities. 

Almost all are fabless at this point, though the reverse was true just two decades ago. Design leadtimes are loooooong - in fact, it's been quite normal for the better part of 20 years for designs with even 60-80% legacy IP content to take 18 months to complete. It's also not uncommon for an ASIC vendor to see 80% of designs never reach production.

The strengths of an ASIC approach for custom logic are indeed compelling. For designs where performance and/or unit price are paramount, an ASIC is the top choice. EDA vendors endeavoring to keep their tools as close to the cutting edge of chip design as possible actively seek close working relationships with the top ASIC houses. Assembly and test houses have been known to court ASIC firms to access licenses to new packaging, as again the leading ASIC vendors tend to be on the forward edge of packaging technology in the industry.

Some market-requirements are only incompletely provided. The third "P" (power) is generally not as well supported as the other two, simply because ASIC companies leave power management considerations and techniques up to the customer's design team. IP licensing is not without its drawbacks - though the pricing is generally superior to that of the open IP market, generally not all of the desired functions are available from the ASIC vendor. CPU and DSP embedded cores can be found and again at better than prevailing market rates, but the selection is normally very restricted - embedded processor IP companies prefer to license their higher end cores directly to customers at much higher prices.

The weaknesses of even the best ASIC offerings are glaring and have remained so throughout the history of the sector. Software stack support is all but nonexistent. Non-recurring engineering (NRE) fees and internal manpower requirements (30-50 for 15-18 month commitments on a typical ASIC design) are so high that only companies with truly deep pockets can seriously consider ASIC projects. The worst of it is the complete lack of flexibility once the design is locked. After IP and tool licensing, manpower commitments and mask sets that add up to $50M or more in costs, one significant bug can kill a chip and render all the sweat, sacrifice and expense worthless. 

You could not step twice into the same river; for other waters are ever flowing on to you. - Heraclitus

Though change has continually swept the ASIC sector over its history, what has made the segment seem relatively static over the last fifteen years has been the very conservative response by ASIC houses to the more recent changes in their circumstances. While the ASIC market steadily ceded ground to the other two custom logic segments, a few ASIC vendors have stayed true to their roots in providing hardware customization with robust EDA support while following Moore's Law down into deeper submicron. Those who couldn't keep up the pace - and there have been quite a few of them, including some once very powerful market participants - steadily dropped out.

Other companies, however, have entered the market with sets of offerings that are clearly intended to rewrite the 'natural order' of things. ARM, for instance, is no longer simply an embedded 32b RISC CPU licensor but also offers graphics and video processors, standard cell and I/O libraries, SRAM compilers, a family of increasingly sophisticated bus hierarchies and a library of peripherals & system controllers. The Synopsys DesignWare group takes things even farther - in addition to their own engineering consulting services and ARC DSP/CPU line, the group offers specialized tools for IP block customization, as well as deep strength in custom analog and mixed signal design. 

When combined with the parent company's EDA design suite, Synopsys can claim even more so than ARM to have become a new kind of custom logic company: a Virtual ASIC House. Clearly other IP and EDA companies have taken note and are busy trying to catch up, as evidenced by Imagination's acquisition of MIPS and Cadence gobbling up Tensilica.

The Foundry sector also seems to be drawing cards in the custom logic game. TSMC has become much more than a straightforward, ordinary fab and offers an increasing amount of standards-based embedded IP, a vast third party ecosystem and engineering services along the entire breadth of front & back end chip design. Global Foundries is also seeing the value of this and is endeavoring to recreate itself in TSMC's image. Strategic planners in chip companies across the globe must be viewing this development with growing alarm, since every step up the technology chain taken by the foundries proportionally reduces the relative value of independent chip firms.

Nevertheless, the ASIC landscape will have to change further - and dramatically so - for it to re-energize its competitiveness in custom logic. But we'll explore how ASIC can revive its fortunes later on in the editorial series.

Our next stop: the world of Programmable Logic.

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